Packages

class InitRegMemFromFile extends Module

Linear Supertypes
Module, ImplicitReset, ImplicitClock, RawModule, BaseModule, IsInstantiable, HasId, InstanceId, AnyRef, Any
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. InitRegMemFromFile
  2. Module
  3. ImplicitReset
  4. ImplicitClock
  5. RawModule
  6. BaseModule
  7. IsInstantiable
  8. HasId
  9. InstanceId
  10. AnyRef
  11. Any
  1. Hide All
  2. Show All
Visibility
  1. Public
  2. Protected

Instance Constructors

  1. new InitRegMemFromFile(debug: Boolean = DebuggerConfigurations.ENABLE_DEBUG, emulateBlockRamDelay: Boolean, memoryFile: String, addrWidth: Int, width: Int, size: Int)

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##: Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: => T)(implicit sourceInfo: SourceInfo): T
    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _bindIoInPlace(iodef: Data)(implicit sourceInfo: SourceInfo): Unit
    Attributes
    protected
    Definition Classes
    BaseModule
  6. var _closed: Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _moduleDefinitionIdentifierProposal: String
    Attributes
    protected
    Definition Classes
    BaseModule
  8. def _sourceInfo: SourceInfo
    Attributes
    protected
    Definition Classes
    BaseModule
  9. def _traitModuleDefinitionIdentifierProposal: Option[String]
    Attributes
    protected
    Definition Classes
    BaseModule
  10. val actualAddr: UInt
  11. val actualData: UInt
  12. val actualWrite: Bool
  13. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  14. def atModuleBodyEnd(gen: => Unit): Unit
    Attributes
    protected
    Definition Classes
    RawModule
  15. def circuitName: String
    Definition Classes
    HasId
  16. final val clock: Clock
    Definition Classes
    Module
  17. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.CloneNotSupportedException]) @IntrinsicCandidate() @native()
  18. final val definitionIdentifier: String
    Definition Classes
    BaseModule
  19. def desiredName: String
    Definition Classes
    BaseModule
  20. def endIOCreation()(implicit si: SourceInfo): Unit
    Definition Classes
    BaseModule
  21. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  22. def equals(that: Any): Boolean
    Definition Classes
    HasId → AnyRef → Any
  23. final def getClass(): Class[_ <: AnyRef]
    Definition Classes
    AnyRef → Any
    Annotations
    @IntrinsicCandidate() @native()
  24. def getCommands: Seq[Command]
    Attributes
    protected
    Definition Classes
    RawModule
  25. def getModulePorts: Seq[Data]
    Attributes
    protected[chisel3]
    Definition Classes
    BaseModule
  26. def hasSeed: Boolean
    Definition Classes
    HasId
  27. def hashCode(): Int
    Definition Classes
    HasId → AnyRef → Any
  28. def implicitClock: Clock
    Attributes
    protected
    Definition Classes
    Module → ImplicitClock
  29. def implicitReset: Reset
    Attributes
    protected
    Definition Classes
    Module → ImplicitReset
  30. def instanceName: String
    Definition Classes
    BaseModule → HasId → InstanceId
  31. val io: Bundle { ... /* 5 definitions in type refinement */ }
  32. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  33. val mem: Vec[UInt]
  34. final lazy val name: String
    Definition Classes
    BaseModule
  35. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  36. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @IntrinsicCandidate() @native()
  37. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @IntrinsicCandidate() @native()
  38. def parentModName: String
    Definition Classes
    HasId → InstanceId
  39. def parentPathName: String
    Definition Classes
    HasId → InstanceId
  40. def pathName: String
    Definition Classes
    HasId → InstanceId
  41. def portsContains(elem: Data): Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  42. def portsSize: Int
    Attributes
    protected
    Definition Classes
    BaseModule
  43. final val reset: Reset
    Definition Classes
    Module
  44. def resetType: Type
    Definition Classes
    Module
  45. def suggestName(seed: => String): InitRegMemFromFile.this.type
    Definition Classes
    HasId
  46. final def synchronized[T0](arg0: => T0): T0
    Definition Classes
    AnyRef
  47. final def toAbsoluteTarget: IsModule
    Definition Classes
    BaseModule → InstanceId
  48. final def toNamed: ModuleName
    Definition Classes
    BaseModule → InstanceId
  49. final def toRelativeTarget(root: Option[BaseModule]): IsModule
    Definition Classes
    BaseModule
  50. def toString(): String
    Definition Classes
    AnyRef → Any
  51. final def toTarget: ModuleTarget
    Definition Classes
    BaseModule → InstanceId
  52. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  53. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException]) @native()
  54. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])

Deprecated Value Members

  1. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.Throwable]) @Deprecated
    Deprecated

    (Since version 9)

  2. def override_clock: Option[Clock]
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  3. def override_clock_=(rhs: Option[Clock]): Unit
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  4. def override_reset: Option[Bool]
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  5. def override_reset_=(rhs: Option[Bool]): Unit
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

Inherited from Module

Inherited from ImplicitReset

Inherited from ImplicitClock

Inherited from RawModule

Inherited from BaseModule

Inherited from IsInstantiable

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped